rkotten 277eb02361 +add: split Verilog Lexer (Verilog and SystemVerilog)		2023-03-20 19:12:33 +01:00
..
Lexilla	+upd: Lexilla v5.2.4	2023-03-15 02:27:06 +01:00
DepGen.py	+upd: Lexilla Lib v5.1.5	2022-02-09 12:40:50 +01:00
deps.mak	+add: split Verilog Lexer (Verilog and SystemVerilog)	2023-03-20 19:12:33 +01:00
Lexilla.cxx	+add: split Verilog Lexer (Verilog and SystemVerilog)	2023-03-20 19:12:33 +01:00
lexilla.mak	+add: split Verilog Lexer (Verilog and SystemVerilog)	2023-03-20 19:12:33 +01:00
LexillaVersion.rc	+upd: Lexilla v5.2.4	2023-03-15 02:27:06 +01:00
nmdeps.mak	+add: split Verilog Lexer (Verilog and SystemVerilog)	2023-03-20 19:12:33 +01:00